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| U6057B Receiver for Point-to-Point Multiplex Systems Description Local, low speed multiplex systems reduce the amount of wires and connectors, save costs and weight and increase the safety in automotive and industrial applications. The U6057B is an ideal receiver for an 8-bit data word with simple protocol of a fixed length. It checks the correct data transmission and provides the data word in an 8-bit shift register for a microcontroller. Features D Only a single data line is necessary D Quadruple comparison of the data signal for high transmission safety D Minimum of peripherals D D D D Master/slave operation Wide supply-voltage range According to VDE 0839 Load-dump protected Ordering Information Extended Type Number U6057B-FL VStab Package SO20 VS 14 V Remarks SYN Synchronization CO Clock output Stabilization POR OSC Oscillator Frequency divider Sequence control detection Safety condition PP Operating mode VS Start pulse detection Data decoding 4/2 DI 14 V VS 2 Data end detection 4-stage counter 1. or 2. byte Overflow store 8 bit Buffer 8 bit Comparison GND P/S DIN CLK Parallel P Serial S Output memory 8-bit shift register DOUT 13273 Figure 1. Block diagram TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 1 (9) Preliminary Information U6057B Pin Configuration Table 1. Pin description GND DIN nc 1 2 3 4 5 20 19 18 17 16 VS VStab OSC nc nc nc nc DT PP CO 13272 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol GND DIN nc P/S CLK nc DOUT nc 2/4 SYN CO PP DT nc nc nc nc OCS Vstab VS Function Ground Serial data input Parallel/serial switch-over Clock input for shift register Serial data output for the mC 2/4-fold comparison Synchronization Clock output for cascading Program pin Data input of data line P/S CLK nc U6057B 6 15 14 13 12 11 DOUT 7 nc 2/4 SYN 8 9 10 RC-oscillator input Stabilized voltage Supply voltage Figure 2. Pinning of U6057B Functional Description Power Supply For protection against interference and surges, the U6057B must be equipped with an RC-circuit for current limitation in the event of overvoltages and for buffering in the event of voltage dips at VS. Recommended frequencies and dimensioning: fOSC = 1 / COSC (0.79 ROSC + 2260 W) fOSC = 25.6 kHz, COSC = 220 pF, ROSC = 200 kW Table 2. Times derived from the transmitted frequency (6.4 kHz) Suggested dimensions: Rv = 510 W, CV = 100 mF (see figure 3 ) An integrated 14-V Z-diode is located between VS and GND. Oscillator All timing in the circuit is derived from an RC-oscillator. The oscillator's charging time t1 is determined by an external resistor, ROSC, and its discharge time t2 by an integrated 2-kW resistor. Since the tolerance and temperature sensitivity of the integrated resistor are considerable greater than those of the external resistor, t1/t2 20 must be selected for stability reasons. The minimum value of ROSC should not be less than 68 kW. Description Start pulse One bit Information bit Zero bit Information unit Data word Data pause Transmission cycle Minimum reaction time Data word master - slave Data pause master - slave Time 312 ms 156 ms 156 ms 156 ms 625 ms 5 ms + 312 ms start bit 9.688 ms 15 ms 60 ms 10 ms + 312 ms start bit 4.688 ms 2 (9) Preliminary Information TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 U6057B Supply Voltage 5 V The receivers can be supplied from one stabilized, noisefree voltage source. In this case, the series resistor and the filter capacitor are not required. Pin VStab is also supplied by the 5-V supply (see figure 4). After double or quadruple coincidence has been established, the content of the buffer is always transferred to the output memory. Since the period of data transmission is 15 ms this results in a minimum delay time of 60 ms or 30 ms for detection of a change of the data word. Faults on the data line and switch bouncing may lead to an extension of the delay time. Precondition to transfer the data word into the output memory: Input P/S must be in high potential. Structure of the Data Word A switch information unit consists of four parts: 1. One bit for receiver synchronization 2. Information bit with "High" = switch open "Low" = switch closed 3. Zero bit 4. Zero bit The data word consists of two start bits and eight information units. For a transmitter frequency of 6.4 kHz, the data word length is 5 ms plus the start pulse followed by a 10-ms-long data interval. The data interval has high potential. When the supply voltage is applied, data transmission is constantly repeated in accordance with this pattern. Synchronization Proper data transfer requires a synchronization between the internal data processing and the microcontroller's read-out frequency. The U6057B provides a synchronization pulse (Pin SYN) of t = 16 1/fOSC which triggers the microcontroller to read-out data in the following time window of typically 2 15 ms or 4 15 ms. The synchronization is derived from the positive edge of the internal transfer pulse. This pulse causes the data transfer to the output shift register after double/quadruple data word comparison. The microcontroller reads the output shift register after each synchronization pulse. In practise, the time delay for data recognition varies depending on the event of data signal change on the data line and the status of the internal 4-stage (or 2-stage) counter. This counter is 0 after each synchronization pulse. With a programmed quadruple comparison the data recognition time ranges from 4 15 ms to 7 15 ms whereas it may range from 2 15 ms to 3 15 ms in the case of the programmed double comparison. If the system is operated with multiple change of the dataword during the comparison time (4 15 ms or 2 15 ms), the data recognition time may last longer than mentioned above. Note: In master - slave operation, each IC produces its own synchronization pulse. Data Decoding If a negative edge appears at the data input, the receiver checks whether a start pulse or a fault is present by measuring the duration of the pulse (a minimum time must be observed). If there is a fault, the receiver waits for the next negative edge. If it recognizes a start pulse, it checks whether an information unit with 8 bits is following and stores this in an 8-bit overflow store. The arriving data are ignored if there is no 8-bit string owing to a fault or a synchronism. The receiver is synchronized by each one bit. Scanning of the information takes place in the middle of the information bit. In order to make scanning sufficiently precise, the oscillator frequency of the receiver was selected to be four times as large as that of the transmitter. The deviation of the receiver frequency to the four-fold transmitter frequency may be up to while still guaranteeing reliable data cognition. "15% Cascading (Master - Slave Operation) Determination of master or slave is defined by the connecting of the Pin PP: Master/ alone: Slave: PP open or PP to VS PP to GND Data Check The data read into the 8-bit overflow store is compared with the content of the buffer. If this is identical, a 4-stage counter is incremented by one stage. If this is not identical, the counter is reset. The new data combination is transferred to the buffer after each comparison irrespective of the result. TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 In master mode, the oscillator is connected with ROSC and COSC, and the clock output is active. In slave mode, the oscillator is blocked and must be activated by the clock output of the master. The master recognizes the start-bit and decodes the first eight information bits. The slave also 3 (9) Preliminary Information U6057B recognizes the start-bit but decodes the second eight information bits. There are several possibilities of cascading D CLK and DOUT are always connected in parallel. Each shift register can be read-out individually by a separate P/S line (see figure 5 ). Input P/S = low serial operation The information available at DIN is transferred to the shift register by the positive edge of CLK and advanced by one position by each further positive edge. The data word appears at DOUT. The maximum clock frequency is 40 kHz. The eighth flip-flop is a master - slave flip-flop. The information of the eighth flip-flop is transferred to the slave with each negative edge from CLK and is available at the output DOUT. DIN, CLK and EN are high-resistance inputs and process a switching threshold of approximate 1.8 V. DOUT is an open-collector output. D CLK and P/S are always connected in parallel. DOUTMASTER and DOUTSLAVE are connected with each other. The 16-bit data word can be read-out serially via DOUTSLAVE in one operation (see figure 6 ) D Combinations with U6052B and U6057B (see figure 7) Loading and Reading-out the Shift Register Loading and reading-out of data from the shift register is controlled by the three inputs DIN, CLK and P/S. Input P/S = high parallel operation No data can be read-out from the shift register. Data which arrive via the data line are stored in the shift register. Output DOUT is disabled (high resistance). Input 4/2 The number of comparisons can be defined by the wiring configuration of input 4/2. 4-fold comparison: Input 4/2 open 2-fold comparison: Input 4/2 connected to VS VBatt 510 W 100 mF ROSC COSC Data input 100 W 5V COSC ROSC Data input 100 W 20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 U6057B 1 2 3 4 5 6 7 8 9 10 1 2 3 4 U6057B 5 6 7 8 9 10 P/S CLK DOUT Processor SYN 13274 P/S CLK DOUT Processor SYN 13275 Figure 3. Supplied with battery voltage Figure 4. Supplied with a stabilized 5-V voltage 4 (9) Preliminary Information TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 U6057B VBatt 270 W 100 mF ROSC COSC Data input 100 W 20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 U6057B 1 2 3 4 5 6 7 8 9 10 1 2 3 4 U6057B 5 6 7 8 9 10 P/S CLK DOUT Processor SYN SYN 13276 Figure 5. Master - slave operation, read-out: 2 8 bit, supplied with 12-V battery Data input COSC ROSC 5V 100 W 20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 U6057B 1 2 3 4 5 6 7 8 9 10 51 kW 1 2 3 4 U6057B 5 6 7 8 9 10 P/S CLK DOUT Processor SYN SYN 13277 Figure 6. Master - slave operation, read-out: 1 16 bit, supplied with stabilized 5 V TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 5 (9) Preliminary Information U6057B Absolute Maximum Ratings Receiver with recommended circuitry Parameters Supply voltage (static) Power dissipation Tamb = 85C Junction temperature Storage temperature range Ambient temperature range Symbol VS Ptot Tj Tstg Tamb Value 25 920 150 -55 to +125 -40 to +85 Unit V mW C C C Thermal Resistance Parameters Junction ambient SO20 Symbol RthJA Value 90 Unit K/W Electrical Characteristics VBatt = 13.5 V, Tamb = 25C, reference point = GND Receiver with recommended circuitry Parameters Supply voltage 5-V supply (without RV and CV) Stabilized voltage Supply current Internal clamping POR threshold Protection resistor Protection capacitor Input data DIN Threshold voltage Input current Internal pull-down resistor Input clock CLK Threshold voltage Input current Internal pull-down resistor Clock frequency Delay time CLK - DOUT Clock pulse length Waiting time P/S - CLK Input parallel/serial P/S Threshold voltage Input current Internal pull-down resistor Input data 2/4 Threshold voltage Input current Internal pull-down resistor Test Conditions / Pins Symbol VBatt VS VStab IS VZ VPOR RV CV VDIN-TH -IDIN-IN RDIN-IN VCLK-TH -ICLK-IN RCLK-IN fCLK tDEL tCPL tWT VP/S-TH -IP/S-IN RP/S-IN V2/4-TH -I2/4-IN R2/4-IN Min. 6 4.75 Typ. Max. 16 5.0 Unit V V V mA V V 2.5 510 5.2 1.5 14.3 3.4 100 3.0 4.0 W mF V 1.6 1.8 100 VDIN = 0 V 2.3 2.0 mA kW 1.6 1.8 100 24.8 10 VCLK = 0 V 2.3 2.0 40 mA kW kHz V 1.0 12 1 1.6 ms ms ms V 1.8 100 VP/S = 0 V 2.3 2.0 mA kW 1.6 1.8 100 V2/4 = 0 V 2.3 2.0 mA kW V 6 (9) Preliminary Information TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 U6057B Parameters Test Conditions / Pins Serial data output DOUT ( open collector ) Saturation voltage 1 mA Current capability Leakage current Rise time RDOUT = 51 kW to Vstab Fall time RDOUT = 51 kW to Vstab Oscillator input OSC Internal discharge resistor Lower threshold Vstab 0.214 Upper threshold Vstab 0.615 Input current VOSC = 0 V Frequency Data input DI Threshold voltage Input current Internal pull-down resistor Internal clamping External protection Program Pin PP Lower threshold Upper threshold Pin PP open Input current VPP = 0 V VPP = VS Clock output CO Output current VCO = 0 V Output open Output current VCO = 1 V Saturation voltage low VCO = 1 V Internal pull-down resistor Synchronization output SYN (open collector) Saturation voltage 1 mA Current capability Leakage current Rise time RSYN = 51 kW to Vstab Fall time RSYN = 51 kW to Vstab Symbol VDOUT IDOUT ILDOUT trOUT tfOUT RDIS VOSC-THL VOSC-THH -IOSC fOSC VDI -IDI RDI VZDI RDI-EXT VPPtl VPPth VPPO -IPP IPP -ICO VCO-open ICO VCO RCO VSYN ISYN ILSYN trSYN tfSYN 110 Vstab 0.8 Min. Typ. Max. 0.2 1.0 5.0 Unit V mA 2 200 1.6 2.0 1.1 3.3 24.8 VS 0.5 1.0 100 14.3 0.1 VS 0.24 VS 0.50 VS 0.37 50 50 300 1.0 1.2 200 0.2 1.0 5.0 2 200 70 2.4 mA ms ns kW V V 1.0 1.0 40.0 mA mA V kHz kW V kW V V V mA mA mA V mA V kW V mA mA ms ns TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 7 (9) Preliminary Information U6057B Package Information Package SO20 Dimensions in mm 12.95 12.70 9.15 8.65 7.5 7.3 2.35 0.4 1.27 11.43 20 11 0.25 0.10 10.50 10.20 0.25 technical drawings according to DIN specifications 13038 1 10 8 (9) Preliminary Information TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 U6057B Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 TELEFUNKEN Semiconductors Rev. A1, 03-Dec-97 9 (9) Preliminary Information |
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